SEMICONDUCTOR MEMORY

PURPOSE:To minimize the periad for supplying power to a sense amplifier for data by reading the value of a reference cell by a sense amplifier for the reference cell. CONSTITUTION:After an address is determined and a sufficient time elapses, a power source for sense amplifiers 4a-4n and a sense amplifier 7 for a reference cell is connected through a SR latch 9 at the fall of a system clock CLK inputted from a terminal 15. When the level of a reference cell 1 is amplified by a sense amplifier 7 for the reference cell and the output level reaches a high logical level, the outputs of the sense amplifiers 4a-4n for data are latched by latches 5a-5n, delayed by a delay circuit 13 and the power source of the sense ampli-fiers 4a-4n and the sense amplifier 7 for the reference cell is disconnected through the SR latch 9. Data stored in the latches 5a-5n are read to the memory 2.