MANUFACTURE OF SEMICONDUCTOR DEVICE

PURPOSE:To prevent contamination due to tungsten silicide(WSi) layer at the time of forming a side wall for reducing difference in level of a bulk wiring while shortening a side wall forming process with reference to a forming method of a bulk wiring having the double layer structure consisting of a polysilicon layer and the tungsten silicide(WSi) layer. CONSTITUTION:A first polysilicon layer 12 is formed on the foundation 11. Thereon, a tungsten silicide(WSi) layer 13 is formed. Thereon, a second polysilicon layer (amorphous silicon layer) 14 is formed. A laminate consisting of these three layers is patterned in the shape of a bulk wiring. An insulating film 15 is overall formed. Anisotropic etching is performed to the insulating film 15 while having a second polysilicon layer (amorphous silicon layer) 14 as a stopper in order to form a side wall 16 on the side wall of the bulk wiring.