JPH0634520B

PURPOSE:To represent the gradation of a still picture with a simple constitution by superimposing a clock pulse on a video signal to form a superimposed video signal and binarizing it. CONSTITUTION:The first clock pulse from a frequency dividing circuit 3 is applied to the emitter of the transistor...

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1. Verfasser: ABUMI TAKAO
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To represent the gradation of a still picture with a simple constitution by superimposing a clock pulse on a video signal to form a superimposed video signal and binarizing it. CONSTITUTION:The first clock pulse from a frequency dividing circuit 3 is applied to the emitter of the transistor TR2 of a clock pulse superimposing circuit 5, a luminance signal Y is inputted to the base of the TR2 and a superimposed luminance signal (d) is outputted. In the TR1a of a matrix circuit 6a, a color difference signal B-Y from a decoder 10 and the superimposed luminance signal (d) are added to output a blue color signal B on which the clock pulse is superimposed and binarized in an A/D converting circuit 7a. Memories 8a-8c store the outputs from the respective A/D converting circuits 7a-7c by making the second clock pulse from a control part 2 a sampling clock pulse and respective chrominance signals are projected on a television monitor through D/A converting circuits 9a-9c.