FRAME MONITOR CIRCUIT

PURPOSE:To simplify a circuit by decoding a bit position for specific information transmission from a detected frame bit, and extracting specific information by a corresponding timing pulse. CONSTITUTION:Data transmitted from a line are received by a network terminating device NT, the pattern of the received data is detected by a frame pattern circuit 6, and frame synchronization is established by a protecting circuit 7. Then, the data are added to a frame counter 8, the F bit pulse of each appearing frame is outputted, and added to a multiframe counter 9. At that time, the counter 9 is equipped with, for example, a 5 bit output terminal. When a 1 multiframe is constituted of 24 frames, data link bits (m)1-(m)12, are inserted into the F bits of the odd-numbered frames, and the least significant bit LSB output is turned to '1'. This is inputted through an odd number decode part 10 to an AND circuit 11, an abnormal bit position is decoded, and abnormal information is extracted in the corresponding timing. Thus, a monitor part 16 can be simplified.