POWER MEASURING APPARATUS

PURPOSE:To accurately measure power in a short period of measurement by setting the high-level period of the output signal of a flip-flop to an integer multiple of input voltage or current cycle. CONSTITUTION:The output of a waveform shaping circuit 11 is applied to the CK terminal of a D-FF 13. A t...

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Bibliographische Detailangaben
Hauptverfasser: HIRAISHI YUKIYOSHI, IWASE HISASHI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To accurately measure power in a short period of measurement by setting the high-level period of the output signal of a flip-flop to an integer multiple of input voltage or current cycle. CONSTITUTION:The output of a waveform shaping circuit 11 is applied to the CK terminal of a D-FF 13. A temporary measuring time generator 12 yields high-level signals for a certain period of time, which are applied to the D terminal of the D-FF 13. While the Q output of the D-FF 13 is at a high level, clocks from a sample clock transmitter 8 pass through a gate 9 and are applied to A/D converters 3 and 4 as sampling signals, which are then converted into digital signals. Thereby the cycle of measurement becomes an integer multiple of power waveform and no error occurs. The effective power measured is displayed in a display 7 under control of a CPU 6.