MANUFACTURE OF SEMICONDUCTOR DEVICE

PURPOSE:To provide the manufacturing method of such a semiconductor device which can suppress the occurrence of punch through phenomena while the gates of an n- and p-channel MOS transistors are maintained at the same dimension and can cope with an increase in degree of integration. CONSTITUTION:Side walls 1b having such a first width that can cover the side wall sections of gate electrode wiring layers 2b and 3b are formed by performing anisotropic etching on an insulating layer formed on the surface of a p-well area 9. Then another side walls 1a having such a second width that can cover the side wall sections of gate electrode wiring layers 2a and 3a and wider than the first width are formed by performing anisotropic etching on an insulating layer formed on an n-well area 8. Then n-impurity diffusion areas 5b are formed in a silicon substrate 7 by using the side walls 1b, etc., as masks. In addition, p-impurity diffusion areas 4b are also formed in the substrate 7 by using the side walls 1a, etc., as masks.