TIMING VERIFICATION CIRCUIT

PURPOSE:To perform the timing verification of functional macro constituted by the combination of the logic cell of a specific system in a timing verification system with prerequisite to use the logic cell of the specific system. CONSTITUTION:This circuit is provided with a signal change detection circuit 3 connected to a first input terminal 1, a decision window generation circuit 4 which inputs the output of the signal change detection circuit 3, a decision condition detection circuit 5 connected to a second input terminal 2, and an AND circuit 6 which takes the AND of the output of the decision window generation circuit 4 and that of the decision condition detection circuit 5, and the output of the AND circuit 6 is connected to the clock input of the flip-flop 7 of the logic cell of the specific system, and when the output of the AND circuit 6 is issued, it is verified as an error.