TELEVISION RECEIVER

PURPOSE:To allow an equalizer and a Y/C separator circuit to use a clock synchronization timing generating circuit in common. CONSTITUTION:An AV switch 51 selectively provides either an output video signal of a channel selection demodulator 2 or an external video signal. The output of the AV switch 51 is given to an equalization circuit 7 via an A/D converter 53 and also to a GC switch 55. The GC switch 55 selects an output of the AV switch 51 just after application of power and selects an output of the AV switch 51 subjected to waveform equalization by the equalization circuit 7. A Y/C separator circuit 15 separates an output of the GC switch 55 into a luminance signal and a chrominance signal, and a clock synchronization timing generating circuit 23 generates a clock and a timing signal and gives them to an equalizer 52 and the Y/C separator circuit 15. Since the equalizer 52 is arranged at a post-stage of the AV switch 51, even when the clock is fed to the equalizer 52 and the Y/C separator circuit 15, the effect of spurious radiation is less.