FORMATION METHOD FOR INTERCONNECTION PATTERN

PURPOSE:To prevent an interconnection pattern from being side-etched when a substratum copper foil is etched by a method wherein a solder film is formed uniformly on the whole face of the sidewall of a copper interconnection pattern. CONSTITUTION:A wiring board on which a copper-plated pattern 5 has...

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Bibliographische Detailangaben
Hauptverfasser: KOBAYASHI SHIRO, WAJIMA MOTOYO, AKABOSHI HARUO
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To prevent an interconnection pattern from being side-etched when a substratum copper foil is etched by a method wherein a solder film is formed uniformly on the whole face of the sidewall of a copper interconnection pattern. CONSTITUTION:A wiring board on which a copper-plated pattern 5 has been formed is immersed in a copper substitution-type chemical solder plating liquid, a chemical solder plating treatment is executed, and a chemical solder-plated film 7 is formed. Then, the wiring board is immersed in an electrolytic solder plating liquid, an electrolytic plating treatment is executed, and an electrolytic solder-plated film 8 is formed on the chemical plated film 7. A resist pattern 3 is exfoliated and removed, and a substratum copper foil 2 is wet-removed by an etching solution. After that, the plated film is removed wholly, and a copper interconnection pattern which is independent is formed on the board. Thereby, the etching amount of the copper interconnection pattern can be reduced when the substratum copper foil is etched, and it is possible to prevent an interconnection resistance from being increased due to an etching treatment.