DATA PROCESSOR WITH INFERENTIAL DATA TRANSFER AND OPERATION METHOD THEREOF

DATA PROCESSOR WITH INFERENTIAL DATA TRANSFER AND OPERATION METHOD THEREOF

PURPOSE: To provide a data processor having inference data transfer. CONSTITUTION: A data processor having inference data transfer is provided with an address circuit 40 and data circuits 42 and 44. The address circuit 40 generates a memory address corresponding to a data block and and a tag. The ta...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: ROBAATO JIEI RIIZU, MAIKERU SHII BETSUKAA, JIYON ESU MIYUHITSUCHI, CHIYAARUSU AARU MUUA
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:PURPOSE: To provide a data processor having inference data transfer. CONSTITUTION: A data processor having inference data transfer is provided with an address circuit 40 and data circuits 42 and 44. The address circuit 40 generates a memory address corresponding to a data block and and a tag. The tag indicates the propriety of the data block. The data circuits 42 and 44 receive the data block corresponding to the memory address at a first time, and receives a signal at a second time. This signal indicates the propriety of the data block. The data circuits 42 and 44 reject the data block in response to the signal. The data processor can receive data while the propriety of the data is judged in parallel by, for example, an address comparison or error correction code constitution.