SEMICONDUCTOR MEMORY DEVICE WITH BUILT-IN MULTIPLE ERROR-CORRECTING CIRCUIT

PURPOSE: To provide a semi-conductor memory device incorporating error correcting circuit by which electric power to be consumed at the time of a normal mode is saved. CONSTITUTION: The semi-conductor memory device for generating parity data and executing an error correcting operation is provided with a memory cell array which is divided into plural sub-cell arrays 100A-100D, plural sense amplifier parts 110A-110D which are respectively connected to the cell arrays 100A-100D and the plural error correcting circuits 130A-130D which are respectively connected to the sense amplifier parts 110A-110D. Moreover, output decoders 140A-140D for respectively receiving the outputs of the error correcting circuits 130A-130D are provided. Then, one of the sub-cell arrays is selected and operated at the time of the normal mode and the whole sub-cell arrays are selected at the time of a page mode so that useless power consumption at the time of an operation at the time of the normal mode is saved.