MASTER SLICE TYPE SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
PURPOSE:To realize the change of writing data at a low cost in a short period of time by a method wherein the writing and reading of data in a read-only memory circuit are effected by the connection of wirings while the change of writing data is realized by the change of only a second via. CONSTITUT...
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creator | OGUCHI YASUHIRO |
description | PURPOSE:To realize the change of writing data at a low cost in a short period of time by a method wherein the writing and reading of data in a read-only memory circuit are effected by the connection of wirings while the change of writing data is realized by the change of only a second via. CONSTITUTION:A plurality of N-channel transistors 501, 502 are put on/off by a word line 506 to read out data to the same branch bit line 511. The number of transistors is determined by the charging and/or discharging time of a potential in a transistor with respect to the branch bit line of the transistor, which is determined by the relative positional relation of transistors, connected to a logical forward turning circuit 509 or connected to a logical inverting circuit 510 and the branch bit line 511, whereby the reading time of data is changed. By this method, high-speed read out can be realized when a P-channel transistor only is connected to the branch bit line or only a n-channel transistor is connected to the branch bit line. |
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CONSTITUTION:A plurality of N-channel transistors 501, 502 are put on/off by a word line 506 to read out data to the same branch bit line 511. The number of transistors is determined by the charging and/or discharging time of a potential in a transistor with respect to the branch bit line of the transistor, which is determined by the relative positional relation of transistors, connected to a logical forward turning circuit 509 or connected to a logical inverting circuit 510 and the branch bit line 511, whereby the reading time of data is changed. By this method, high-speed read out can be realized when a P-channel transistor only is connected to the branch bit line or only a n-channel transistor is connected to the branch bit line.</description><edition>5</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; INFORMATION STORAGE ; PHYSICS ; SEMICONDUCTOR DEVICES ; STATIC STORES</subject><creationdate>1994</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19940121&DB=EPODOC&CC=JP&NR=H0613586A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19940121&DB=EPODOC&CC=JP&NR=H0613586A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>OGUCHI YASUHIRO</creatorcontrib><title>MASTER SLICE TYPE SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE</title><description>PURPOSE:To realize the change of writing data at a low cost in a short period of time by a method wherein the writing and reading of data in a read-only memory circuit are effected by the connection of wirings while the change of writing data is realized by the change of only a second via. CONSTITUTION:A plurality of N-channel transistors 501, 502 are put on/off by a word line 506 to read out data to the same branch bit line 511. The number of transistors is determined by the charging and/or discharging time of a potential in a transistor with respect to the branch bit line of the transistor, which is determined by the relative positional relation of transistors, connected to a logical forward turning circuit 509 or connected to a logical inverting circuit 510 and the branch bit line 511, whereby the reading time of data is changed. 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CONSTITUTION:A plurality of N-channel transistors 501, 502 are put on/off by a word line 506 to read out data to the same branch bit line 511. The number of transistors is determined by the charging and/or discharging time of a potential in a transistor with respect to the branch bit line of the transistor, which is determined by the relative positional relation of transistors, connected to a logical forward turning circuit 509 or connected to a logical inverting circuit 510 and the branch bit line 511, whereby the reading time of data is changed. By this method, high-speed read out can be realized when a P-channel transistor only is connected to the branch bit line or only a n-channel transistor is connected to the branch bit line.</abstract><edition>5</edition><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INFORMATION STORAGE PHYSICS SEMICONDUCTOR DEVICES STATIC STORES |
title | MASTER SLICE TYPE SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE |
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