METHOD FOR BIT PHASE SYNCHRONIZATION AND FRAME PHASE SYNCHRONIZATION
PURPOSE:To implement bit phase synchronization and frame phase synchronization while invalid data or a data delay in the frame phase synchronization is suppressed with simple configuration. CONSTITUTION:A byte just before a pointer in a reception frame (offset address #29) is detected by a #29 addre...
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creator | ICHIMORI MINEKI TAJIMA SEIJIRO FUKAMI KENNOSUKE |
description | PURPOSE:To implement bit phase synchronization and frame phase synchronization while invalid data or a data delay in the frame phase synchronization is suppressed with simple configuration. CONSTITUTION:A byte just before a pointer in a reception frame (offset address #29) is detected by a #29 address monitor section 4' and a reception pointer is loaded to a down-counter 8 when the byte is outputted from a bit synchronization buffer 1. The loading of the reception pointer to the down-counter 8 is delayed and the result of the delay is fetched for a time from the reception point of time of the xsi29 data (point of time when being written in the bit synchronization buffer 1) till the xsi29 data are outputted from a frame phase synchronization buffer 5. Furthermore, in the case of converting a transmission line phase fluctuation into a stuff, an active stuff byte is generated in the buffer and a position signal of a specific byte in which an absolute time location is fluctuated is used for a load timing to the down-counter 8 and the reception pointer is used for load data. |
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CONSTITUTION:A byte just before a pointer in a reception frame (offset address #29) is detected by a #29 address monitor section 4' and a reception pointer is loaded to a down-counter 8 when the byte is outputted from a bit synchronization buffer 1. The loading of the reception pointer to the down-counter 8 is delayed and the result of the delay is fetched for a time from the reception point of time of the xsi29 data (point of time when being written in the bit synchronization buffer 1) till the xsi29 data are outputted from a frame phase synchronization buffer 5. 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CONSTITUTION:A byte just before a pointer in a reception frame (offset address #29) is detected by a #29 address monitor section 4' and a reception pointer is loaded to a down-counter 8 when the byte is outputted from a bit synchronization buffer 1. The loading of the reception pointer to the down-counter 8 is delayed and the result of the delay is fetched for a time from the reception point of time of the xsi29 data (point of time when being written in the bit synchronization buffer 1) till the xsi29 data are outputted from a frame phase synchronization buffer 5. Furthermore, in the case of converting a transmission line phase fluctuation into a stuff, an active stuff byte is generated in the buffer and a position signal of a specific byte in which an absolute time location is fluctuated is used for a load timing to the down-counter 8 and the reception pointer is used for load data.</description><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRICITY</subject><subject>MULTIPLEX COMMUNICATION</subject><subject>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1993</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHDxdQ3x8HdRcPMPUnDyDFEI8HAMdlUIjvRz9gjy9_OMcgzx9PdTcPQDqghy9HXFLs_DwJqWmFOcyguluRkU3FxDnD10Uwvy41OLCxKTU_NSS-K9AjwMTC2MjYwtHY2JUAIAGoMr0g</recordid><startdate>19930402</startdate><enddate>19930402</enddate><creator>ICHIMORI MINEKI</creator><creator>TAJIMA SEIJIRO</creator><creator>FUKAMI KENNOSUKE</creator><scope>EVB</scope></search><sort><creationdate>19930402</creationdate><title>METHOD FOR BIT PHASE SYNCHRONIZATION AND FRAME PHASE SYNCHRONIZATION</title><author>ICHIMORI MINEKI ; TAJIMA SEIJIRO ; FUKAMI KENNOSUKE</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPH0583239A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1993</creationdate><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRICITY</topic><topic>MULTIPLEX COMMUNICATION</topic><topic>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</topic><toplevel>online_resources</toplevel><creatorcontrib>ICHIMORI MINEKI</creatorcontrib><creatorcontrib>TAJIMA SEIJIRO</creatorcontrib><creatorcontrib>FUKAMI KENNOSUKE</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>ICHIMORI MINEKI</au><au>TAJIMA SEIJIRO</au><au>FUKAMI KENNOSUKE</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>METHOD FOR BIT PHASE SYNCHRONIZATION AND FRAME PHASE SYNCHRONIZATION</title><date>1993-04-02</date><risdate>1993</risdate><abstract>PURPOSE:To implement bit phase synchronization and frame phase synchronization while invalid data or a data delay in the frame phase synchronization is suppressed with simple configuration. CONSTITUTION:A byte just before a pointer in a reception frame (offset address #29) is detected by a #29 address monitor section 4' and a reception pointer is loaded to a down-counter 8 when the byte is outputted from a bit synchronization buffer 1. The loading of the reception pointer to the down-counter 8 is delayed and the result of the delay is fetched for a time from the reception point of time of the xsi29 data (point of time when being written in the bit synchronization buffer 1) till the xsi29 data are outputted from a frame phase synchronization buffer 5. Furthermore, in the case of converting a transmission line phase fluctuation into a stuff, an active stuff byte is generated in the buffer and a position signal of a specific byte in which an absolute time location is fluctuated is used for a load timing to the down-counter 8 and the reception pointer is used for load data.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY MULTIPLEX COMMUNICATION TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
title | METHOD FOR BIT PHASE SYNCHRONIZATION AND FRAME PHASE SYNCHRONIZATION |
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