JPH057868B
The invention provides a film carrier (1) for a semiconductor device (2) to be tested with a tester (60) having a plurality of test pins (61) arranged with a predetermined interval (P4) therebetween and comprising a film substrate (10) of insulating material. A plurality of conductive leads (14) are...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | The invention provides a film carrier (1) for a semiconductor device (2) to be tested with a tester (60) having a plurality of test pins (61) arranged with a predetermined interval (P4) therebetween and comprising a film substrate (10) of insulating material. A plurality of conductive leads (14) are arranged on the film substrate with a predetermined spacing (P3, P5) with respect to each other. Each lead has testing lead portion (14b) and circuit lead portion (14a). The spacing (P5) between the adjacent testing lead portion is larger than the spacing (P3) between the adjacent circuit lead portion. In the method of manufacturing the semiconductor device after testing the leads (14) are cut so as to separate the device from the film carrier (1) and at least some of the testing lead portions (14b) remain on the carrier (1). The tester of the invention is associated with an embodiment of the carrier (Fig. 5) in which the testing lead portions are implemented as test pads (32) which are staggered on adjacent leads (14). |
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