FAULT SIMULATION SYSTEM

PURPOSE:To reduce the memory capacity used in a fault simulation system which performs the fault simulation of a logic circuit including a RAM. CONSTITUTION:A test pattern deciding means 3 decides whether an input test pattern 2 is identical with an address fixed pattern or not based on the simulati...

Ausführliche Beschreibung

Bibliographische Detailangaben

1. Verfasser:	SEKINE YOSHIO
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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