REFERENCE DELAY GENERATOR AND ELECTRONIC DEVICE USING THE SAME

PURPOSE:To form the device generating a delay with high stability and high accuracy in the non-periodic operation by outputting a delay clock resulting from delaying a reference clock from a delay unit, detecting a phase difference between both the reference and delay clocks and setting the phase difference to be an integral number of multiple of a specific angle. CONSTITUTION:A phase detection circuit PDD obtains a phase difference between delay clocks DCK, XDCK and non-delay clocks CK0, XCK0 and generates a control signal so that the phase difference of both the clocks is set to be an integral number of multiple of, e.g. 90 deg.. The control signal is generated from a control circuit CT comprising the phase detection circuit PDD, a charge pump circuit CP and a capacitor C. Then a voltage VC is outputted from the circuit CP by outputs UP, DN of the circuit PDD and gives it to N sets of delay elements E of the delay unit VCD and M sets of delay elements E of the delay circuit DLC. The delay time of the circuit DCL is controlled by the control circuit CT comprising the phase detection circuit PDD, the charge pump circuit CP and the capacitor C.