CLOCK OSCILLATION CIRCUIT

PURPOSE:To automatically reduce the power consumption without requiring software by providing a detection means detecting the access state of the computer and a clock signal control means making an automatic control of stopping clock signals and reducing the frequency with the input of the signals detected by the detection means on a clock sending circuit. CONSTITUTION:A clock signal control means of a clock sending circuit 4 supplying clock signals to the CPU 1 comprises the power saving circuit to reduce the frequency of the clock signals in the DMA of the computer, and consists of a frequency divider 3, OR gate 6, AND gates 7, 8, and an invertor 9. When an I/O device 5 makes DMA operation, the CPU 1 suspends the processing and outputs acknowledgement signals to DMAC 2. The DMAC 2 occupies the instruction of sending signals to output DACK signals to the I/O device 5. In this case, the frequency of the clock signal is reduced and the frequency-divided clock signals are automatically inputted through the clock sending circuit 4 and through the power saving circuit to the CPU 1.