JPH05307491

PURPOSE:To attain compact duplexing by incorporating a CPU with a means which judges the state of the CPU of the other party and decides that it becomes an ordinary working system. CONSTITUTION:The CPU consists of the CPU-A1 and the CPU-B1, and they are connected respectively to a transmission line...

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Bibliographische Detailangaben
Hauptverfasser: AMAHI YASUHIRO, SHIMOYAMA KAZUHIKO, SASAKI WATARU, WAKITA AKIHIRO, YAMAOKA HIROMASA, KAWADA SHINICHI, SAITOU SUMIHISA
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To attain compact duplexing by incorporating a CPU with a means which judges the state of the CPU of the other party and decides that it becomes an ordinary working system. CONSTITUTION:The CPU consists of the CPU-A1 and the CPU-B1, and they are connected respectively to a transmission line 50 and a system bus 60, and usually, the CPU-A1 is the ordinary working system, and inputs data from an input/output device (I/O) 3, and executes arithmetic operation in a micro- processing unit(MPU) 4, and instructs the I/O 3 and outputs the data to the same. The CPU-B1 of a standby system is inhibited from accessing the I/O 3 since an SYSBEN signal 113 is turned OFF, and receives the data from the CPU-A1 through the transmission line 50, and executes the same arithmetic operation as the CPU-A1, and stands by. When the CPU-A1 stops, an ordinary working/standby judgement circuit 5 detects that the CPU-B1 is turned to the ordinary working system by the turning-OFF of an SYSRUN signal 101, and turns ON the SYSBEN signal 113, and the CPU-B1 starts write-in to the I/O 3.