JPH0529940B

A data processing system having separate kernel, vertical and horizontal microcode, separate loading of vertical microcode and a permanently resident kernel microcode, and a soft console with dual levels of capability. The system includes a processor having dual ALC and microcode processors, and an...

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Bibliographische Detailangaben
Hauptverfasser: KENESU BAANZU, UOOKAA ANDAASON, MAAKU DAGURASU HAMERU, SUCHIIBUN JEFURII UORATSUCHI, JEEMUZU EDOWAADO BERESU, JEEMUZU EMU GAIYAA, HARORUDO AARU KIMENZU, DEEBITSUDO AIRA EPUSUTAIN, DEEBITSUDO RII KIITEINGU, KEB
Format: Patent
Sprache:eng
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Zusammenfassung:A data processing system having separate kernel, vertical and horizontal microcode, separate loading of vertical microcode and a permanently resident kernel microcode, and a soft console with dual levels of capability. The system includes a processor having dual ALC and microcode processors, and an instruction processor. Also included are a processor incorporating a multifunction processor memory, a malfunction nibble shifter, and a high speed look-aside memory control.