LOGIC CIRCUIT

LOGIC CIRCUIT

PURPOSE:To prevent malfunction of a D flip-flop even when a '0' glitch noise takes place between signals of logic '1' being clock inputs by adding a circuit comprising a delay gate and a 2:1 selector to the input of the D flip-flop. CONSTITUTION:A protection circuit comprising de...

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser: OKAYASU HIDEKI
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
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Beschreibung
Zusammenfassung:PURPOSE:To prevent malfunction of a D flip-flop even when a '0' glitch noise takes place between signals of logic '1' being clock inputs by adding a circuit comprising a delay gate and a 2:1 selector to the input of the D flip-flop. CONSTITUTION:A protection circuit comprising delay gates 6, 7 and 2:1 selector circuits 3, 4 is provided among a data input terminal 1, a clock input terminal 2 and a D flip-flop 5 in a circuit diagram in the case of NTn. Thus, even when '0' glitch noise takes place, malfunction of the D flip-flop due to glich noise is avoided.