JPH05298386

PURPOSE:To efficiently measure time sequence coverage in logical simulation. CONSTITUTION:An area for storing a changed result flag indicating that a signal line is changed at least once during the execution of simulation and initial change time indicating the time generating the 1st change is forme...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: HASEGAWA TOMOHIDE, SHIMIZU TSUGUO
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To efficiently measure time sequence coverage in logical simulation. CONSTITUTION:An area for storing a changed result flag indicating that a signal line is changed at least once during the execution of simulation and initial change time indicating the time generating the 1st change is formed in each signal line in a logical circuit model, and when an event is generated during the execution of simulation, the changed result flag of the signal line is checked. When the flag is not set up, the flag is set up, the time is stored as initial change time, and at the end of the simulation, the initial change time values are totalized and outputted to a terminal equipment 108. The number of times of setting up the flag is interactively outputted to the equipment 108 in each updating of simulation time. When processing for setting up the flag is not executed within a prescribed limit time is not executed, the simulation is ended.