JPH05298073

PURPOSE:To quickly obtain the operation result by constituting unit circuits so that carry to be propagated to the next stage is obtained in accordance with a multiplier, a multiplicand, and other input conditions by the look ahead method. CONSTITUTION:The multiplying circuit consisting of first mXn...

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1. Verfasser: ISHII MICHIO
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To quickly obtain the operation result by constituting unit circuits so that carry to be propagated to the next stage is obtained in accordance with a multiplier, a multiplicand, and other input conditions by the look ahead method. CONSTITUTION:The multiplying circuit consisting of first mXn-bit (for example, m=n=2) multiplying circuits U10 to U21 and second m'Xn'-bit (m'>m and n'>n) multiplying circuits constituted based on first multiplying circuits U10 to U21 is so constituted that carry signals propagated among first multiplying circuits U10 to U21 are generated without passing the operation results in accordance with states of signals inputted to second multiplying circuits. That is, a circuit U00 to which the signal of a second carry output terminal ECO is outputted is the carry generating circuit, and its input terminals CI0, CI2, K0, K1, K3, X0, X1 (multiplier), Y0, and Y1 (multiplicand) are connected to input terminals ECI0, ECII, EK0, EK1, EK2, EX0, EX1, EY0, and EY1 respectively, and the carry is generated in accordance with input signals.