JPH05233220

PURPOSE:To suppress the influence of a noise and to prevent the generation of a level drop at the propagation of a carry signal by connecting a transistor(TR) for forcedly setting up an output carry signal to a '0' level and forming a TR for propagating an input carry signal by TRs of N an...

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1. Verfasser: FUKUDA TERUMI
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To suppress the influence of a noise and to prevent the generation of a level drop at the propagation of a carry signal by connecting a transistor(TR) for forcedly setting up an output carry signal to a '0' level and forming a TR for propagating an input carry signal by TRs of N and P channels. CONSTITUTION:Signal level judging parts 1, 2, a precharging circuit 3, an adder 5, and a latch circuit 5 are the same as that of a convensional arithmetic circuit. When an output signal from the judging part 1 is in an active level, a carry signal control part 6 turns on a TR Q16, turns an output carry signal Cout to an '1' level, and when the output signal of the judging part 2 is in the active level, turns on a transfer gate 61 and propagates an input carry signal Cin as an output carry signal Cout. Both the output signals of the judging parts 1, 2 are in an inactive level, TRs Q14, Q15 are always turned on and an output carry signal is forcedly turned to a '0' level.