HORIZONTAL SYNCHRONIZING SIGNAL GENERATION CIRCUIT FOR PICTURE SIGNAL

PURPOSE:To fatch an exact picture signal in a display/picture memory by continuously generating a necessary horizontal synchronizing signal and preventing the release of the lock of a PLL even when the horizontal synchronizing signal in a vertical synchronizing period is missed, or different. CONSTITUTION:An inverse VSUNC input 7 and an HSYNC input 8 are inputted to a gate 9, an HSYNC signal obtained by removing the vertical synchronizing period of an inverse HSYNC signal is generated and transmitted to an edge detection 10 and the second terminal of a gate 18. The edge detection 10 clocks an input signal by a clock generation 11 and a synchronism measuring counter 12 transmits a pulse of 1 clock width to a measured value register 13, interpolation signal preparing counter 14, and gate 15. The counter 14 is synchronized and latched with the output of the gate 15 and outputs a borrow signal. The borrow signal is transmitted through synchronism 16 to the first terminal of a gate 17 as a new horizontal synchronizing signal, the new horizontal synchronizing signal generated in the vertical synchronizing period is continuously inserted into the horizontal synchronizing signal, so that the release of the lock of the PLL can be prevented.