MULTIPLEX TRANSMISSION EQUIPMENT

PURPOSE:To prevent the transmission of erroneous data to a transmission line even in the case of the occurrence of operation abnormality in a control node. CONSTITUTION:A watchdog timer circuit (WD circuit) 16 which detects runaway of a CPU 11 and the operation abnormality of a transmission/receptio...

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Bibliographische Detailangaben
Hauptverfasser: NOBUTOKI NOBUKAZU, NAKAJIMA TAKASHI, SONE AKIRA
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To prevent the transmission of erroneous data to a transmission line even in the case of the occurrence of operation abnormality in a control node. CONSTITUTION:A watchdog timer circuit (WD circuit) 16 which detects runaway of a CPU 11 and the operation abnormality of a transmission/reception buffer 15 are incorporated in a multiple LSI14 for the control of multiplex transmission. When detecting the runaway of the CPU 11, the WD circuit 16 gives a first abnormality detection signal AN1 to a reset IC 17 to reset the CPU 11 and gives a transmission data acceptance control signal RC, which inhibits the acceptance of the transmission request from the CPU 11, to the transmission/ reception buffer 15. When detecting the operation abnormality of the transmission/reception buffer 15, the WD circuit gives a second abnormality detection signal AN2 to the CPU 11 to output a second reset signal R2 to the transmission/reception buffer 15 from the CPU 11.