SYNCHRONIZATION LOCKING PN CHECKER

PURPOSE:To discriminate the occurrence of dissidence between an internally generated pattern and a PN pattern due to momentary interruption or slip by allowing a select section and a count section to implement the operation of re-synchronization automatically with asynchronous information when out o...

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Bibliographische Detailangaben
Hauptverfasser: KIMOTO AKIHIKO, TANAKA HIROTO
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To discriminate the occurrence of dissidence between an internally generated pattern and a PN pattern due to momentary interruption or slip by allowing a select section and a count section to implement the operation of re-synchronization automatically with asynchronous information when out of synchronism takes place. CONSTITUTION:A pattern in n-bit PN patterns is in existence for a period of (2-1) bits, and a same pattern is generated by a PN pattern generating section 1 for a period of 511 bits. When a decoder section 4 decodes a specific pattern in an input signal, the section sends its output to a count section 5. A decode output is added to a comparison synchronization protection section 6 to protect the result of comparison of coincidence/dissidence. Synchronization information/asynchronization information is sent to a select section 2 and the count section 2 after the establishment of synchronization. Thus, the selector section 2 loops the PN pattern generating section 1 and masks a decode output inputted to the count section 5 to inhibit counting. When out of synchronism takes place, re-synchronization is implemented automatically by the asynchronous information from the protection section 6.