JUNCTION TYPE FIELD-EFFECT TRANSISTOR INTEGRATED CIRCUIT AND MANUFACTURE THEREOF

PURPOSE:To reduce a cost of an IC and to accelerate its operating speed by reducing a side gate effect of a junction type field-effect transistor formed on a semi-insulating board and resultantly decreasing the size of a pattern. CONSTITUTION:Junction type field-effect transistors J2, J7, J8 formed...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: MAEMURA KIMIMASA
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PURPOSE:To reduce a cost of an IC and to accelerate its operating speed by reducing a side gate effect of a junction type field-effect transistor formed on a semi-insulating board and resultantly decreasing the size of a pattern. CONSTITUTION:Junction type field-effect transistors J2, J7, J8 formed on a semi-insulating board 1 are individually surrounded by electrodes 2 formed on a part in which a circuit element is not formed on the same board 1, and connected to the electrodes 2 so as apply highest VDD of the voltages in the circuit. The board parts around the transistors J2, J7, J8 become a high potential to shield a side gate effect of the adjacent circuit elements.