SEMICONDUCTOR INTEGRATED CIRCUIT

PURPOSE:To set the load drive capability of a buffer in response to a load by providing a signal line through which a control signal operating drivers whose number corresponds to the load capacitance added to a common output terminal is supplied to its input terminal to the circuit. CONSTITUTION:Each of drivers 9a-9n is provided with an input terminal 10, a control input terminal 11 to which a state control signal of the drivers is inputted and an output terminal 12. The output buffer circuit is provided with an n-bit register 13 latching signals 14a-14n controlling the operating state of N sets of the drivers 9a-9n and has an input terminal 16 and an output terminal 17. When a large load capacitance is added to the output terminal 17 and data are set to all of n-bits of the register 13, the state control signals 14a-14n go to H. Since an H signal is inputted to each control input of the drivers 9a-9n, they are in the operating state to set a large drive capability. The drive capability of the output drive circuit is changed by setting required data in response to the load capacity.