STATIC MEMORY

PURPOSE:To eliminate the supply current flowing to a defective bit line at the time of non-selection in the case of the bit line which has a defect of contact with an earth potential point. CONSTITUTION:An internal chip select signal CSIb is supplied to gates of transistors TRs Q5, Q7, Q8, and Q10 a...

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Bibliographische Detailangaben
1. Verfasser: UCHIDA SHOZO
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To eliminate the supply current flowing to a defective bit line at the time of non-selection in the case of the bit line which has a defect of contact with an earth potential point. CONSTITUTION:An internal chip select signal CSIb is supplied to gates of transistors TRs Q5, Q7, Q8, and Q10 as load elements connected between bit lines B1, B2, BR1, and BR2 and the supply potential point. These TRs Q5, Q7, Q8, and Q10 are set to the nonconductive state at the time of non-selection by the internal chip select signal CSIb.