RAM WHICH FOLLOW UP POWER SOURCE FLUCTUATION AT HIGH SPEED

PURPOSE:To divide the voltage of a plate between a power source and the ground by a parasitic capacity so that the RAM can follow up the fluctuation in power source voltage at a high speed by adding the parasitic capacity equiv. to the parasitic capacity between the plate to serve as a reference lev...

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1. Verfasser: KUBONO SHIYOUJI
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To divide the voltage of a plate between a power source and the ground by a parasitic capacity so that the RAM can follow up the fluctuation in power source voltage at a high speed by adding the parasitic capacity equiv. to the parasitic capacity between the plate to serve as a reference level of a memory cell capacitor and the ground potential. CONSTITUTION:A conductive layer 11 consisting of a gate wiring is provided between the plate 8 and a bit line 9 consisting of an aluminum layer and is connected to a power source Vcc. The parasitic capacity C2 generated between the plate layer 8 and the power source Vcc at this time has the capacity of the sum of the parasitic capacity generated between the plate layer 8 and the bit line 9 and the parasitic capacity generated between the bit line 9 and the power source Vcc. The plate level attains the potential divided by the series resistance and the parasitic capacity between the power source and the ground when this method is applied to a memory cell of a DRAM type, thereby the delay by the CR is suppressed. The plate level follows up the fluctuation in the power source Vcc at the high speed even if the power source fluctuates at the time of data retention. The wait time for the power source fluctuation is thus shortened.