MEMORY ACCESS DEVICE

PURPOSE:To execute an access at a high speed in the case of erasing all chips, and in the case of writing the same data in all the chips. CONSTITUTION:Between a decoder 1 for decoding the upper three bits A17, A18 and A19 of an address signal from the outsides and AND gates 2 for taking AND of a card select signal notCS and an output of the decoder 1, OR gates 4, 4... provided in accordance with each output of the decoder 1. To each of these OR gates 4, 4... each corresponding output signal of the decoder 1 and all chip enable signals notAS are inputted, and each output of the decoder 1 is inputted to each AND gate 2 through this OR gate. The card select signal notCS and all chip enable signals not AS become active and non-active, respectively, and by applying an address signal to the decoder 1, chips 3, 3 can be accessed separately. Also, when the card select signal, notCS and all chip enable signals notAS become active, respectively, all the chips 3, 3... can be accessed simultaneously.