PROCESSING FORK FOR SEMICONDUCTOR WAFER

PROCESSING FORK FOR SEMICONDUCTOR WAFER

PURPOSE:To approximately equalize the sectional secondary moment with that in case of a solid fork for lessening the dead weight while reducing the bend by a method wherein the loading part of the title fork is hollow-structured to lessen the dead weight thereof while ribs or bulkheads are provided...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: NOZAWA TATSUO, WATABE YOSHIYUKI
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:PURPOSE:To approximately equalize the sectional secondary moment with that in case of a solid fork for lessening the dead weight while reducing the bend by a method wherein the loading part of the title fork is hollow-structured to lessen the dead weight thereof while ribs or bulkheads are provided in the hollow part. CONSTITUTION:The title fork is composed of an Si impregnated SiC while the loading part 11 is hollow-structured having a hollow part 12 extending in the long direction of the fork 1. The hollow part 12 in the loading part 11 is provided with multiple ribs 13 extending in the long direction while it is recommended that the relation between the width A of the ribs 13 and the intervals B between the ribs 13 shall be A:B=1:1-3:1.