SINGLE CLOCK CONTROL SYSTEM AND CLOCK CONTROLLER

PURPOSE:To simplify the single clock control and to curtail the hardware circuit quantity by providing a clock stop process and a clock start process and executing the clock single control by combining both the processes. CONSTITUTION:When a single clock signal is issued, a start process is executed...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: MURANO HIROSHI, KOMATSUDA HIROSHI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To simplify the single clock control and to curtail the hardware circuit quantity by providing a clock stop process and a clock start process and executing the clock single control by combining both the processes. CONSTITUTION:When a single clock signal is issued, a start process is executed, based on the transition of rise of a signal B, and a value held in a register of a clock control marker 3 by a process executed immediately before. Subse quently, by using a transition of a fall of the signal B and a value obtained by adding '1' to the marker 3 used in the start process, a stop process is execut ed, and after it is finished, the value obtained by adding '1' is set, and there after, by executing the start process, the continuity of a clock cycle at the time when it is transferred to a continuous clock state is secured. In the clock start process, a timing signal of an output of a timing generating part 6 is selected, based on a counter value '1' and a mode value '8tau' set to a register of the marker 3 by the stop process executed immediately before, and a clock stop signal is reset simultaneously to turn-off.