JPH0457031B

PURPOSE:To attain simulation easily by using a logical circuit model which operates at a slow execution speed but calculates its operating process in details and a logical circuit model which operates at a high execution speed and calculates only logical circuit elements operatable by a machine word instruction. CONSTITUTION:The logical circuit model 1 which operates at a slow logical circuit simulation execution speed but calculates the operating process of the logical circuit in details and the logical circuit model 2 which operates a high speed and calculates only logical circuit constitutional elements operatable by a machine word instruction are connected to false registers 3, 3... and a false memory 4, which are used for both the models 1, 2 in common so as to be referred and updated from any model. The model 2 executes the machine word instructions of the initial setting part and result discriminating part of a test program and the model 1 executes the machine word instruction of a test execution part. Consequently, the logical circuit simulation can be attained at a high speed.