CLOCK GENERATING CIRCUIT

PURPOSE:To generate a timing clock by generating the pulse of an object width from the leading or trailing edges of an inputted signal by one clock, detecting whether or not the input pulse is normal, retarding the input pulse normally or retarding the output of a clock generating means 1 in the abnormal state by one clock. CONSTITUTION:A reception clock is fed to a clock identification circuit 10, which confirms the normality based on a change point as the leading or trailing edge of the clock. Then the result is fed to a changeover circuit 11 together with an output of a pulse generating circuit 12 and a reception clock, the circuit 11 selects a signal of the pulse generating circuit 12 when a signal being not normal is fed to the circuit 11 and selects the reception clock when a normal signal is fed to the circuit 11 and the selected signal is fed to the pulse generating circuit 12. The pulse generating circuit 12 generates a clock with a duty on request based on a change point as the leading or trailing edges of the clock. The clock is a clock signal to an external device and comes to the a timing clock of a flip-flop 13.