LOGIC CIRCUIT SIMULATING METHOD

PURPOSE:To prevent the runaway of a logic circuit (1) occurring by executing a program comprised of a machine language instruction by a logic circuit model (1) and a logic circuit model (2) alternately. CONSTITUTION:The logic circuit model (1) which calculates sequentially progress changing by the execution of each machine language instruction of the program to which all the output signal values of the fundamental logic element of an AND gate or an OR gate comprising a logic circuit device are supplied, and also, the logic circuit model (2) which calculates changing progress by executing the machine language instruction only on a logic circuit constituent that can be operated by each machine language instruction of the register and memory of the logic circuit device, etc., are provided. The logic circuit model (1) executes only designated number of instructions, and delivers control to the logic circuit model (2), and the logic circuit model (2) executes the instruction by the designated number of instructions, and delivers the control to another. Thereby, since the number of instruction execution steps at the logic circuit model (1) can be designated from the outside, the runaway of the logic circuit (1) can be prevented occurring when a logic defect occurs.