SYNCHRONIZING STATE IDENTIFICATION CIRCUIT

PURPOSE:To attain the detection of coincidence of a long synchronizing word in a short time by applying successive comparison to remaining (N-n) bits one by one bit each based on the correlation detection signal of an n-bit correlation detection section detecting the correlation of initial n-bits in...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
Hauptverfasser:	YAMASHITA ATSUSHI, SHIMADA HIDEHISA
Format:	Patent
Sprache:	eng
Schlagworte:	ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

Beschreibung
Zusammenfassung:	PURPOSE:To attain the detection of coincidence of a long synchronizing word in a short time by applying successive comparison to remaining (N-n) bits one by one bit each based on the correlation detection signal of an n-bit correlation detection section detecting the correlation of initial n-bits in an N-bit synchronizing word, and identifying the result of comparison to identify the synchronizing state. CONSTITUTION:Upon the receipt of an N-bits synchronizing word, first n-bits (n