PLL CIRCUIT

PURPOSE:To prevent an influence in respect to the disturbance of a clock by controlling a VCO based on the compared result of a second phase comparator when a pull-in state monitoring circuit judges that a PLL circuit is not set in a pull-in state and controlling the VCO based on the compared result of a first phase comparator when it is judged that the PLL circuit is set in the pull-in state. CONSTITUTION:The pull-in state monitoring circuit 1 monitors the pull-in state of the PLL circuit according to phase relation between the clock of a lower frequency, among the two kinds of frequencies, and a clock generated by the PLL circuit. A first phase comparator 2 compares the clock phase of the higher frequency. A second phase comparator 3 compares the clock phase of the lower frequency. A selective circuit 4 executes switching so as to output the compared result of the second phase comparator 3 through a loop filter 5 to the side of a VCO 6 when the pull-in state monitoring circuit 1 judges that the PLL circuit is not set in the pull-in state, and to output the compared result of the first phase comparator 2 when it is judged that the PLL circuit is set in the pull-in state.