JPH0434860B

PURPOSE:To reduce the scale of a scanning circuit and at the same time to decrease extremely the number of junctures between a photodetecting element and the scanning circuit, by using an FET having at least two gate electrodes as an analog switch, and the arithmetic result of these gate electrodes and a matrix-shaped wiring of said electrodes. CONSTITUTION:Capacitors 6 of photoconductive films which are linearly arrayed are connected to the drain of an FET containing at least two gate electrodes and to a preamplifier 8. These two electrodes are connected in a matrix form of X and Y, and only the FETs of picture elements corresponding to X1 and Y1 are turned on. Then the drains of these FETs are reset to a fixed level of target voltage 5. When either gate electrode is turned off, a photocurrent flows toward an arrow in the diagram. Then the potential of the capacity 5 drops gradually at the drain side. When the picture elements of X1 and Y1 are selected again, the electric charge equivalent to that flowed out during a light quantity storage period flows through the FET. The amount of this current is detected by means of the amplifier 8 and an integrator 9 of the next stage. Then these operations are scanned for each picture element.