CHIP LIFE TEST APPARATUS FOR SEMICONDUCTOR DEVICE

PURPOSE: To test the life of a semiconductor device in the state of a chip by providing a probe joined to the electrode of a chip disposed on a tray to be electrically connected, a substrate connected to the probe and including a circuit pattern for executing the life test on a chip and a clamp for...

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Bibliographische Detailangaben
Hauptverfasser:	PAKU KI, KUON OO SHIKU, JIYON GIIYON, YUN JINNHIYUN
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS SEMICONDUCTOR DEVICES TESTING
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Beschreibung
Zusammenfassung:	PURPOSE: To test the life of a semiconductor device in the state of a chip by providing a probe joined to the electrode of a chip disposed on a tray to be electrically connected, a substrate connected to the probe and including a circuit pattern for executing the life test on a chip and a clamp for fixing the substrate. CONSTITUTION: A chip 1 is disposed at a groove 2a and fixed. Then the chip 5a of a probe 5 connected to the circuit pattern 3 of a substrate 4 fixed by a clamp 6 is joined by the electrode 1a of the chip 1. Thereby the performance and electrical life test of a semiconductor can be executed in the state of a chip to prevent the packaging of a defective chip to reduce the cost and to miniaturize the scale of the tester.