BUS CONTROLLER OF MULTIPROCESSOR SYSTEM

PURPOSE:To improve the inferiority of the bus use efficiency of a single system bus by enabling plural system buses to be regarded as a single resource and to eliminate the problem of the complicatedness of software for plural system buses and the generation of a loss time. CONSTITUTION:Plural bus use request signals are inputted at a time to only one arbitor circuit 22 which is present so as to regard the system buses as one resource, and the arbitor circuit supplies a bus permission signal specifying a bus to be used to the respective system buses; and the bus permission signal specified by the arbitor circuit is inputted to interface circuits 11a, 11b, 12a, 12b, 13a, and 13b, which put the corresponding buses in access operation in the multiprocessor system. Thus, the bus control circuit for the multiprocessor system is constituted.