INFORMATION PROCESSOR

PURPOSE:To constitute the processor so that the data to which a high speed access becomes necessary and the data of a large capacity to which high reliability is requested can be stored by constituting the memory of a memory having a parity generating/inspecting means and a memory having an ECC (error correction code) generating/inspecting/correcting means. CONSTITUTION:At the time of write of parity generating/inspecting means 24 - 26 in a first memory 2 connected to a processor 1 through buses 70 - 90, a parity bit is generated, added and stored. Also, at the time of read-out, the parity is inspected, and in the same way, at the time of write of ECC generating/inspecting/correcting means 34 - 36 in a second memory 3 connected to the processor 1 through the buses 70 - 90, an ECC is generated, added and stored, and moreover, at the time of read-out, the ECC is generated, inspected and corrected. In such a way, the data to which a high speed access becomes necessary, the data to which high reliability is requested, and the data of a large capacity can be stored.