ELECTRICALLY ERASABLE NONVOLATILE SEMICONDUCTOR STORAGE DEVICE

PURPOSE:To contrive an increase in the integration of the title device by a method wherein floating gates are respectively divided functionally into a write site and an erase site and in the sides of the erase sites, a tunnel oxide film is provided to constitute the erase sites without providing a s...

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1. Verfasser: YOSHIMI MASANORI
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To contrive an increase in the integration of the title device by a method wherein floating gates are respectively divided functionally into a write site and an erase site and in the sides of the erase sites, a tunnel oxide film is provided to constitute the erase sites without providing a source offset and in the sides of the write sites, a source offset is provided to constitute the write sites. CONSTITUTION:One pair of L-shaped floating gates 2 consisting of a polysilicon film are respectively provided on gate regions between a source line 3 in the surface of a silicon substrate and one pair of drain lines 4 and 4 arranged on both sides of the line 3 via an insulating film. Moreover, control gates 5 consisting of a polysilicon film to the gates 5 are respectively provided on the gates 2 via an interlayer insulating film. In one pair of write sites, writing using an injection of electrons from the side of each drain to each gate 2 is performed. On the other hand, in the erase sites, erase using an F-N tunneling is performed en bloc from the side of a source to the gates 2 and 2.