JPH0428179B

A logic circuit includes a driver transistor (Qs) and a load transistor (Q6), each a junction type or Schottky barrier type field effect transistor, and an input terminal (VIN) connected to a gate of the driver transistor. A gate voltage generator (1) is connected to a gate of the load transistor an...

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Bibliographische Detailangaben
1. Verfasser: SUYAMA KATSUHIKO
Format: Patent
Sprache:eng
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Zusammenfassung:A logic circuit includes a driver transistor (Qs) and a load transistor (Q6), each a junction type or Schottky barrier type field effect transistor, and an input terminal (VIN) connected to a gate of the driver transistor. A gate voltage generator (1) is connected to a gate of the load transistor and generates a level higher than the sum of threshold values of the load transistor and the driver transistor and lower than a low value among the first sum of a built-in voltage of the load transistor and the threshold voltage of the driver transistor and the second sum of a built-in voltage of the driver transistor and the threshold voltage of the load transistor.