MULTI-INPUT NAND CIRCUIT

PURPOSE:To eliminate a change in an operating speed depending on the input state to each terminal Tin by connecting a Pch transistor (TR) TRp and an Nch TRm to each input terminal Tin in an uniform. state. CONSTITUTION:Sources of PchFETs 11-13 are connected to a power supply VCC, three-stages of NchFETs 11-13 each are connected between a drain and ground and groups 1a-1c are connected together. Gates of the TRs 11-13 are connected to gates of TRs 14,17,20. One of upper, middle and lower stages of the TR groups 1a-1c is selected and connected to each input terminal Tin1-Tin3 as specified. Thus, the condition to each of the input terminals Tin1-Tin3 in the 3-input NAND circuit is uniform, and even when the input signals Vin1, Vin2 are at an H level and the input signal Vin3 changes from L to H level, and even when the input signals Vin2, Vin3 are at an H level and the input signal Vin1 changes from L to H level, the leading speed of an output signal- Vout is equal and no skew is caused.1.