BIT SYNCHRONIZING CIRCUIT

PURPOSE:To obtain a synchronized reception signal by setting the extent of delay to be given to the reception signal in accordance with phase relations between a reception-side clock and the reception signal at the time of the start of transmission of a digital signal from a transmission circuit to a reception circuit. CONSTITUTION:A programmable delay circuit 21 has delay lines connected in series in 20 stages, and a delay extent control circuit 23 takes out two signals in accordance with the extent of delay to be successively varied and set. A digital signal discriminating circuit 63 discriminates these two signals at the timing synchronized with the reference clock supplied from a clock source 65. A discrimination timing detecting circuit 22 fetches two discriminated output signals and discriminates whether two output signals are kept in the coincidence state within a prescribed time or not and reports the result to the circuit 23. The circuit 23 sets this value to the circuit 21 and fixes it. That is, the reception-side clock is used to discriminate the reception signal, and the frame phase on the reception side is synchronized.