INTERRUPTION CONTROL SYSTEM

INTERRUPTION CONTROL SYSTEM

PURPOSE:To prevent the program fault due to an interruption and also to improve the program executing speed in an interruption control system of a microprocessor system, etc. CONSTITUTION:The start and end addresses of an address range of a program where an enable or disable state is desired for int...

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1. Verfasser: NAGAYAMA MARI
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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creator NAGAYAMA MARI
description PURPOSE:To prevent the program fault due to an interruption and also to improve the program executing speed in an interruption control system of a microprocessor system, etc. CONSTITUTION:The start and end addresses of an address range of a program where an enable or disable state is desired for interruption are stored in an address storage means 1, e.g. a register. Then an interruption control means 2 compares the program execution address with the addresses stored in the means 1. When the coincidence is obtained between the execution address and the start address, the interruption is set in an enable or disable state. Meanwhile the interruption is set in a disable or enable state when the coincidence is obtained between the execution address and the end address respectively.
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Then an interruption control means 2 compares the program execution address with the addresses stored in the means 1. When the coincidence is obtained between the execution address and the start address, the interruption is set in an enable or disable state. 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Then an interruption control means 2 compares the program execution address with the addresses stored in the means 1. When the coincidence is obtained between the execution address and the start address, the interruption is set in an enable or disable state. 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Then an interruption control means 2 compares the program execution address with the addresses stored in the means 1. When the coincidence is obtained between the execution address and the start address, the interruption is set in an enable or disable state. Meanwhile the interruption is set in a disable or enable state when the coincidence is obtained between the execution address and the end address respectively.</abstract><oa>free_for_read</oa></addata></record>
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title INTERRUPTION CONTROL SYSTEM
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