DATA PROCESSOR

DATA PROCESSOR

PURPOSE: To attain the independent control of each memory in a chip by outputting a control signal to a switching means and selectively inputting or outputting serial data in or from a serial register. CONSTITUTION: A pin S1 is connected to the output of a tap latch 44, a pin S0 is connected to the...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: JIERII AARU BANAKEN, FUREDERITSUKU EI BARENTE, KAARU EMU GUTATSUGU, REIMONDO PINKUHAMU, DANIERU EFU ANDAASON
Format: Patent
Sprache:eng
Schlagworte:
ADVERTISING
ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION
CALCULATING
COMPUTING
COUNTING
CRYPTOGRAPHY
DISPLAY
EDUCATION
IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
INFORMATION STORAGE
PHYSICS
SEALS
STATIC STORES
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Beschreibung
Zusammenfassung:PURPOSE: To attain the independent control of each memory in a chip by outputting a control signal to a switching means and selectively inputting or outputting serial data in or from a serial register. CONSTITUTION: A pin S1 is connected to the output of a tap latch 44, a pin S0 is connected to the input of a shift register 34 and registers 34, 36 are connected in cascade. A pin S2 is connected to the input of a shift register 38, a pin S3 is connected to the output of a tap latch 48 and registers 38, 40 are connected in cascade. Consequently, data are inputted to the register 34 in series and fetched from the tap output of the register 36. Similarly, data are inputted to the register 38 in series and fetched from the tap output of the register 40.