INTERRUPTION PROCESSING TIME CONTROL SYSTEM FOR ONE-CHIP MICROCOMPUTER

PURPOSE:To keep a system in a stable state with a one-chip microcomputer by controlling the interruption processing time by hardware to inform the excess of the processing time to the outside, therefore omitting an operating system which controls the interruption processing time, and detecting exter...

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1. Verfasser: NAKAGAWA YUJIRO
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To keep a system in a stable state with a one-chip microcomputer by controlling the interruption processing time by hardware to inform the excess of the processing time to the outside, therefore omitting an operating system which controls the interruption processing time, and detecting externally the adverse influence given to a program due to the excess of the interruption processing time in order to easily deal with the adverse influence. CONSTITUTION:When the interruption processing is started, an interruption control circuit 2 produces an interruption occurrence signal T8 and counts up a count register 6 with an AND logic secured to a clock. A comparator 5 compares the value set previously to an internal register 4 with the count value of the register 6. When the coincidence is detected between both values, the comparator 5 outputs a coincidence output signal T10 to the outside via an external output terminal 11 to show the laps of the limit time of the interruption processing.