BIT CONVERSION CIRCUIT

PURPOSE:To shorten processing time by designating an address to control the switching of the bit arrangement of first and second bit column conversion means and read and write columns in (n) bit row memory by a conversion address generating means. CONSTITUTION:A first bit column conversion means 1 i...

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1. Verfasser: YOGOSHI NORIYUKI
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To shorten processing time by designating an address to control the switching of the bit arrangement of first and second bit column conversion means and read and write columns in (n) bit row memory by a conversion address generating means. CONSTITUTION:A first bit column conversion means 1 inputs the content of (n) bits of each column in original bit data developed in two-dimensional fashion in (n) rows and (m) columns, and switches the bit arrangement under the control of the conversion address generating means 4. The (n) bits switching the bit arrangement of the means 1 are written on a write column address generated by the means 4 of (n) bit row memory 21, 22,..., 2n, and are called to a row in accordance with a second bit column conversion means 3, respectively. The means 3 inputs the content of (n) bits in each column of (n) bit row memory, and switches the arrangement of bits under the control of the conversion means 4, and outputs them as the data in each column after conversion in parallel. Thereby, it is possible to provide universality for all kinds of bit conversion.